View PCF8563TF4118_4352187.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

pcf8563 real-time clock/calendar 16 april 1999 product speci?cation 1. general description the pcf8563 is a cmos real-time clock/calendar optimized for low power consumption. a programmable clock output, interrupt output and voltage-low detector are also provided. all address and data are transferred serially via a two-line bidirectional i 2 c-bus. maximum bus speed is 400 kbits/s. the built-in word address register is incremented automatically after each written or read data byte. 2. features n provides year, month, day, weekday, hours, minutes and seconds based on 32.768 khz quartz crystal n century ?ag n wide operating supply voltage range: 1.0 to 5.5 v n low back-up current; typical 0.25 m a at v dd = 3.0 v and t amb =25 c n 400 khz two-wire i 2 c-bus interface (at v dd = 1.8 to 5.5 v) n programmable clock output for peripheral devices: 32.768 khz, 1024 hz, 32 hz and 1 hz n alarm and timer functions n voltage-low detector n integrated oscillator capacitor n internal power-on reset n i 2 c-bus slave address: read a3h; write a2h n open drain interrupt pin. 3. applications n mobile telephones n portable instruments n fax machines n battery powered products.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 2 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 4. quick reference data 5. ordering information 6. block diagram table 1: quick reference data symbol parameter conditions min max unit v dd supply voltage operating mode i 2 c-bus inactive; t amb =25 c 1.0 5.5 v i 2 c-bus active; f scl = 400 khz; t amb = - 40 to +85 c 1.8 5.5 v i dd supply current; timer and clkout disabled f scl = 400 khz - 800 m a f scl = 100 khz - 200 m a f scl = 0 hz; t amb =25 c v dd = 5 v - 550 na v dd = 2 v - 450 na t amb operating ambient temperature - 40 +85 c t stg storage temperature - 65 +150 c table 2: ordering information type number package name description version pcf8563p dip8 plastic dual in-line package; 8 leads (300 mil) sot97-1 pcf8563t so8 plastic small outline package; 8 leads; body width 3.9 mm sot96-1 pcf8563ts tssop8 plastic thin shrink small outline package; 8 leads; body width 3.0 mm sot505-1 fig 1. block diagram. handbook, full pagewidth mgm662 0 control/status 1 oscillator 32.768 khz 1 control/status 2 2 seconds/vl 3 minutes 4 hours 5 days 6 weekdays 7 months/century 8 years 9 minute alarm a hour alarm b day alarm c weekday alarm d e clkout control f timer control timer oscillator monitor voltage detector i 2 c-bus interface divider control logic address register por v dd clkout 1 hz osco scl sda v ss int osci 1 2 3 4 8 6 5 7
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 3 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 7. pinning information 7.1 pinning 7.2 pin description fig 2. pin con?guration. fig 3. device diode protection diagram. handbook, halfpage 1 2 3 4 8 7 6 5 mgr885 pcf8563p pcf8563t pcf8563ts v dd clkout osco scl sda v ss int osci handbook, halfpage mgr886 sda 4 5 v ss scl 3 6 int clkout 2 7 osco v dd 1 8 osci pcf8563 table 3: pin description symbol pin description osci 1 oscillator input osco 2 oscillator output int 3 interrupt output (open-drain; active low) v ss 4 ground sda 5 serial data i/o scl 6 serial clock input clkout 7 clock output (open-drain) v dd 8 positive supply
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 4 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8. functional description the pcf8563 contains sixteen 8-bit registers with an auto-incrementing address register, an on-chip 32.768 khz oscillator with an integrated capacitor, a frequency divider which provides the source clock for the real-time clock (rtc), a programmable clock output, a timer, an alarm, a voltage-low detector and a 400 khz i 2 c-bus interface. all 16 registers are designed as addressable 8-bit parallel registers although not all bits are implemented. the ?rst two registers (memory address 00h and 01h) are used as control and/or status registers. the memory addresses 02h through 08h are used as counters for the clock function (seconds up to year counters). address locations 09h through 0ch contain alarm registers which de?ne the conditions for an alarm. address 0dh controls the clkout output frequency. 0eh and 0fh are the timer control and timer registers, respectively. the seconds, minutes, hours, days, months, years as well as the minute alarm, hour alarm and day alarm registers are all coded in bcd format. the weekdays and weekday alarm register are not coded in bcd format. when one of the rtc registers is read the contents of all counters are frozen. therefore, faulty reading of the clock/calendar during a carry condition is prevented. 8.1 alarm function modes by clearing the msb (bit ae = alarm enable) of one or more of the alarm registers, the corresponding alarm condition(s) will be active. in this way an alarm can be generated from once per minute up to once per week. the alarm condition sets the alarm ?ag, af (bit 3 of control/status 2 register). the asserted af can be used to generate an interrupt ( int). bit af can only be cleared by software. 8.2 timer the 8-bit countdown timer (address 0fh) is controlled by the timer control register (address 0eh; see ta b l e 2 5 ). the timer control register selects one of 4 source clock frequencies for the timer (4096, 64, 1, or 1 60 hz), and enables/disables the timer. the timer counts down from a software-loaded 8-bit binary value. at the end of every countdown, the timer sets the timer ?ag tf (see ta b l e 7 ). the timer ?ag tf can only be cleared by software. the asserted timer ?ag tf can be used to generate an interrupt ( int). the interrupt may be generated as a pulsed signal every countdown period or as a permanently active signal which follows the condition of tf. ti/tp (see ta b l e 7 ) is used to control this mode selection. when reading the timer, the current countdown value is returned. 8.3 clkout output a programmable square wave is available at the clkout pin. operation is controlled by the clkout frequency register (address 0dh; see ta b l e 2 3 ). frequencies of 32.768 khz (default), 1024, 32 and 1 hz can be generated for use as a system clock, microcontroller clock, input to a charge pump, or for calibration of the oscillator. clkout is an open-drain output and enabled at power-on. if disabled it becomes high-impedance.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 5 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.4 reset the pcf8563 includes an internal reset circuit which is active whenever the oscillator is stopped. in the reset state the i 2 c-bus logic is initialized and all registers, including the address pointer, are cleared with the exception of bits fe, vl, td1, td0, testc and ae which are set to logic 1. 8.5 voltage-low detector and clock monitor the pcf8563 has an on-chip voltage-low detector. when v dd drops below v low the vl bit (voltage low, bit 7 in the seconds register) is set to indicate that reliable clock/calendar information is no longer guaranteed. the vl ?ag can only be cleared by software. the vl bit is intended to detect the situation when v dd is decreasing slowly for example under battery operation. should v dd reach v low before power is re-asserted then the vl bit will be set. this will indicate that the time may be corrupted. 8.6 register organization fig 4. voltage-low detection. handbook, halfpage vl set normal power operation period of battery operation t v dd v low mgr887 table 4: registers overview bit positions labelled as - are not implemented; those labelled with 0 should always be written with logic 0. address register name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00h control/status 1 test1 0 stop 0 testc 0 0 0 01h control/status 2 0 0 0 ti/tp af tf aie tie 0dh clkout frequency fe ----- fd1 fd0 0eh timer control te ----- td1 td0 0fh timer countdown value
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 6 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. [1] not coded in bcd. 8.6.1 control/status 1 register table 5: bcd formatted registers overview bit positions labelled as - are not implemented. address register name bcd format tens nibble bcd format units nibble bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 2 3 2 2 2 1 2 0 2 3 2 2 2 1 2 0 02h seconds vl 03h minutes - 04h hours -- 05h days -- 06h weekdays ----- [1] 07h months/century c -- 08h years 09h minute alarm ae 0ah hour alarm ae - 0bh day alarm ae - 0ch weekday alarm ae ---- [1] table 6: control/status 1 register bits description (address 00h) bit symbol description 7 test1 test1 = 0; normal mode. test1 = 1; ext_clk test mode; see section 8.7 . 5 stop stop = 0; rtc source clock runs. stop = 1; all rtc divider chain ?ip-?ops are asynchronously set to logic 0; the rtc clock is stopped (clkout at 32.768 khz is still available). 3 testc testc = 0; power-on reset override facility is disabled (set to logic 0 for normal operation). testc = 1; power-on reset override is enabled. 6, 4, 2 to 0 0 by default set to logic 0.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 7 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.6.2 control/status 2 register [1] tf and int become active simultaneously. [2] n = loaded countdown timer value. timer stopped when n = 0. table 7: description of control/status 2 register bits description (address 01h) bit symbol description 7 to 5 0 by default set to logic 0. 4 ti/tp ti/tp = 0: int is active when tf is active (subject to the status of tie). ti/tp = 1: int pulses active according to ta b l e 8 (subject to the status of tie). note that if af and aie are active then int will be permanently active. 3 af when an alarm occurs, af is set to logic 1. similarly, at the end of a timer countdown, tf is set to logic 1. these bits maintain their value until overwritten by software. if both timer and alarm interrupts are required in the application, the source of the interrupt can be determined by reading these bits. to prevent one ?ag being overwritten while clearing another, a logic and is performed during a write access. see ta b l e 9 for the value descriptions of bits af and tf. 2tf 1 aie bits aie and tie activate or deactivate the generation of an interrupt when af or tf is asserted, respectively. the interrupt is the logical or of these two conditions when both aie and tie are set. aie = 0: alarm interrupt disabled; aie = 1: alarm interrupt enabled. tie = 0: timer interrupt disabled; tie = 1: timer interrupt enabled. 0 tie table 8: int operation (bit ti/tp = 1) source clock (hz) int [1] period (s) n [2] =1 n>1 4 096 1 8192 1 4096 64 1 128 1 64 1 1 64 1 64 1 60 1 64 1 64 table 9: value descriptions for bits af and tf r/w bit: af bit: tf value description value description read 0 alarm ?ag inactive 0 timer ?ag inactive 1 alarm ?ag active 1 timer ?ag active write 0 alarm ?ag is cleared 0 timer ?ag is cleared 1 alarm ?ag remains unchanged 1 timer ?ag remains unchanged
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 8 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.6.3 seconds, minutes and hours registers 8.6.4 days, weekdays, months/century and years registers table 10: seconds/vl register bits description (address 02h) bit symbol description 7 vl vl = 0: reliable clock/calendar information is guaranteed; vl = 1: reliable clock/calendar information is no longer guaranteed. 6 to 0 these bits represent the current seconds value coded in bcd format; value = 00 to 59. example: = 101 1001, represents the value 59 s. table 11: minutes register bits description (address 03h) bit symbol description 7 - not implemented 6 to 0 these bits represent the current minutes value coded in bcd format; value = 00 to 59. table 12: hours register bits description (address 04h) bit symbol description 7 to 6 - not implemented 5 to 0 these bits represent the current hours value coded in bcd format; value=00to23. table 13: days register bits description (address 05h) bit symbol description 7 to 6 - not implemented 5 to 0 these bits represent the current day value coded in bcd format; value = 01 to 31. the pcf8563 compensates for leap years by adding a 29th day to february if the year counter contains a value which is exactly divisible by 4, including the year 00. table 14: weekdays register bits description (address 06h) bit symbol description 7 to 3 - not implemented 2 to 0 these bits represent the current weekday value 0 to 6; see ta bl e 1 5 . these bits may be re-assigned by the user.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 9 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. table 15: weekday assignments day bit 2 bit 1 bit 0 sunday 0 0 0 monday 0 0 1 tuesday 0 1 0 wednesday 0 1 1 thursday 1 0 0 friday 1 0 1 saturday 1 1 0 table 16: months/century register bits description (address 07h) bit symbol description 7 c century bit. c = 0; indicates the century is 20xx. c = 1; indicates the century is 19xx. xx indicates the value held in the years register; see ta bl e 1 8 . this bit is toggled when the years register over?ows from 99 to 00. these bits may be re-assigned by the user. 6to5 - not implemented 4 to 0 these bits represents the current month value coded in bcd format; value = 01 to 12; see ta b l e 1 7 . table 17: month assignments month bit 4 bit 3 bit 2 bit 1 bit 0 january00001 february00010 march 00011 april 00100 may 00101 june 00110 july 00111 august 01000 september 01001 october 10000 november 10001 december 10010 table 18: years register bits description (address 08h) bit symbol description 7 to 0 this register represents the current year value coded in bcd format; value = 00 to 99.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 10 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.6.5 alarm registers when one or more of the alarm registers are loaded with a valid minute, hour, day or weekday and its corresponding ae (alarm enable) bit is a logic 0, then that information will be compared with the current minute, hour, day and weekday. when all enabled comparisons ?rst match, the bit af (alarm flag) is set. af will remain set until cleared by software. once af has been cleared it will only be set again when the time increments to match the alarm condition once more. alarm registers which have their ae bit set at logic 1 will be ignored. table 19: minute alarm register bits description (address 09h) bit symbol description 7 ae ae = 0; minute alarm is enabled. ae = 1; minute alarm is disabled. 6 to 0 these bits represents the minute alarm information coded in bcd format; value = 00 to 59. table 20: hour alarm register bits description (address 0ah) bit symbol description 7 ae ae = 0; hour alarm is enabled. ae = 1; hour alarm is disabled. 6 to 0 these bits represents the hour alarm information coded in bcd format; value = 00 to 23. table 21: day alarm register bits description (address 0bh) bit symbol description 7 ae ae = 0; day alarm is enabled. ae = 1; day alarm is disabled. 6 to 0 these bits represents the day alarm information coded in bcd format; value = 01 to 31. table 22: weekday alarm register bits description (address 0ch) bit symbol description 7 ae ae = 0; weekday alarm is enabled. ae = 1; weekday alarm is disabled. 6 to 0 these bits represents the weekday alarm information value0to6.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 11 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.6.6 clkout frequency register 8.6.7 countdown timer registers the timer register is an 8-bit binary countdown timer. it is enabled and disabled via the timer control register bit te. the source clock for the timer is also selected by the timer control register. other timer properties, e.g. interrupt generation, are controlled via the control/status 2 register. for accurate read back of the countdown value, the i 2 c-bus clock scl must be operating at a frequency of at least twice the selected timer clock. table 23: clkout frequency register bits description (address 0dh) bit symbol description 7 fe fe = 0; the clkout output is inhibited and the clkout output is set to high-impedance. fe = 1; the clkout output is activated. 6to2 - not implemented 1 fd1 these bits control the frequency output (f clkout ) on the clkout pin; see ta bl e 2 4 . 0 fd0 table 24: clkout frequency selection fd1 fd0 f clkout 0 0 32.768 khz 0 1 1 024 hz 1 0 32 hz 111hz table 25: timer control register bits description (address 0eh) bit symbol description 7 te te = 0; timer is disabled. te = 1; timer is enabled. 6to2 - not implemented 1 td1 timer source clock frequency selection bits. these bits determine the source clock for the countdown timer, see ta b l e 2 6 . when not in use, td1 and td0 should be set to 11 ( 1 60 hz) for power saving. 0 td0 table 26: timer source clock frequency selection td1 td0 timer source clock frequency (hz) 0 0 4096 0164 101 11 1 60 table 27: timer countdown value register bits description (address 0fh) bit symbol description 7 to 0 this register holds the loaded countdown value n. countdown period n source clock frequency --------------------------------------------------------- - =
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 12 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.7 ext_clk test mode a test mode is available which allows for on-board testing. in this mode it is possible to set up test conditions and control the operation of the rtc. the test mode is entered by setting bit test1 in the control/status1 register. the clkout pin then becomes an input. the test mode replaces the internal 64 hz signal with the signal that is applied to the clkout pin. every 64 positive edges applied to clkout will then generate an increment of one second. the signal applied to the clkout pin should have a minimum pulse width of 300 ns and a minimum period of 1000 ns. the internal 64 hz clock, now sourced from clkout, is divided down to 1 hz by a 2 6 divide chain called a pre-scaler. the pre-scaler can be set into a known state by using the stop bit. when the stop bit is set, the pre-scaler is reset to 0. stop must be cleared before the pre-scaler can operate again. from a stop condition, the ?rst 1 s increment will take place after 32 positive edges on clkout. thereafter, every 64 positive edges will cause a 1 s increment. remark: entry into ext_clk test mode is not synchronized to the internal 64 hz clock. when entering the test mode, no assumption as to the state of the pre-scaler can be made. 8.7.1 operation example 1. enter the ext_clk test mode; set bit 7 of control/status 1 register (test = 1) 2. set bit 5 of control/status 1 register (stop = 1) 3. clear bit 5 of control/status 1 register (stop = 0) 4. set time registers (seconds, minutes, hours, days, weekdays, months/century and years) to desired value 5. apply 32 clock pulses to clkout 6. read time registers to see the ?rst change 7. apply 64 clock pulses to clkout 8. read time registers to see the second change. repeat steps 7 and 8 for additional increments. 8.8 power-on reset (por) override mode the por duration is directly related to the crystal oscillator start-up time. due to the long start-up times experienced by these types of circuits, a mechanism has been built in to disable the por and hence speed up on-board test of the device. the setting of this mode requires that the i 2 c-bus pins, sda and scl, be toggled in a speci?c order as shown in figure 5 . all timing values are required minimum. once the override mode has been entered, the chip immediately stops being reset and normal operation starts i.e. entry into the ext_clk test mode via i 2 c-bus access. the override mode is cleared by writing a logic 0 to bit testc. re-entry into the override mode is only possible after testc is set to logic 1. setting testc to logic 0 during normal operation has no effect except to prevent entry into the por override mode.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 13 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.9 serial interface the serial interface of the pcf8563 is the i 2 c-bus. a detailed description of the i 2 c-bus speci?cation, including applications, is given in the brochure: the i 2 c-bus and how to use it , order no. 9398 393 40011 or i 2 c peripherals data handbook ic12. 8.9.1 characteristics of the i 2 c-bus the i 2 c-bus is for bidirectional, two-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor. data transfer may be initiated only when the bus is not busy. the i 2 c-bus system con?guration is shown in figure 6 . a device generating a message is a transmitter, a device receiving a message is the receiver. the device that controls the message is the master and the devices which are controlled by the master are the slaves. 8.9.2 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line, while the clock is high is de?ned as the start condition (s). a low-to-high transition of the data line while the clock is high is de?ned as the stop condition (p); see figure 7 . fig 5. por override sequence. handbook, full pagewidth mgm664 scl 500 ns 2000 ns sda 8 ms override active power up fig 6. i 2 c-bus system con?guration. mba605 master transmitter / receiver slave receiver slave transmitter / receiver master transmitter master transmitter / receiver sda scl fig 7. start and stop conditions on the i 2 c-bus. w idth mbc622 sda scl p stop condition sda scl s start condition
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 14 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.9.3 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time will be interpreted as a control signal; see figure 8 . 8.9.4 acknowledge the number of data bytes transferred between the start and stop conditions from transmitter to receiver is unlimited. each byte of eight bits is followed by an acknowledge bit. the acknowledge bit is a high level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges must pull down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event the transmitter must leave the data line high to enable the master to generate a stop condition. fig 8. bit transfer on the i 2 c-bus. d th mbc621 data line stable; data valid change of data allowed sda scl fig 9. acknowledge on the i 2 c-bus. w idth mbc602 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 15 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 8.9.5 i 2 c-bus protocol addressing: before any data is transmitted on the i 2 c-bus, the device which should respond is addressed ?rst. the addressing is always carried out with the ?rst byte transmitted after the start procedure. the pcf8563 acts as a slave receiver or slave transmitter. therefore the clock signal scl is only an input signal, but the data signal sda is a bidirectional line. the pcf8563 slave address is shown in figure 10 . clock/calendar read/write cycles: the i 2 c-bus con?guration for the different pcf8563 read and write cycles are shown in figure 11 , 12 and 13 . the word address is a four bit value that de?nes which register is to be accessed next. the upper four bits of the word address are not used. fig 10. slave address. fig 11. master transmits to slave receiver (write mode). handbook, halfpage mrb016 1 0 1 0 0 0 a0 r/w group 1 group 2 w idth s 0a slave address word address a a data p acknowledgement from slave acknowledgement from slave acknowledgement from slave r/w auto increment memory word address mbd822 n bytes
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 16 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 9. limiting values fig 12. master reads after setting word address (write word address; read data). handbook, full pagewidth s 0a slave address word address a a slave address acknowledgement from slave acknowledgement from slave acknowledgement from slave r/w acknowledgement from master a data auto increment memory word address mgl409 p no acknowledgement from master 1 data auto increment memory word address last byte r/w s1 n bytes at this moment master-transmitter becomes master receiver and pcf8563 slave-receiver becomes slave-transmitter fig 13. master reads slave immediately after ?rst byte (read mode). handbook, full pagewidth s 1a slave address data a1 data acknowledgement from slave acknowledgement from master no acknowledgement from master r/w auto increment word address mgl665 auto increment word address n bytes last byte p table 28: limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage - 0.5 +6.5 v i dd supply current - 50 +50 ma v i input voltage on inputs scl and sda - 0.5 6.5 v input voltage on input osci - 0.5 v dd + 0.5 v v o output voltage on outputs clkout and int - 0.5 6.5 v i i dc input current at any input - 10 +10 ma i o dc output current at any output - 10 +10 ma p tot total power dissipation - 300 mw t amb operating ambient temperature - 40 +85 c t stg storage temperature - 65 +150 c
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 17 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 10. static characteristics table 29: static characteristics v dd = 1.8 to 5.5 v; v ss =0v; t amb = - 40 to 85 c; f osc = 32.768 khz; quartz r s =40k w ; c l = 8 pf; unless otherwise speci?ed. symbol parameter conditions min typ max unit supplies v dd supply voltage i 2 c-bus inactive; t amb =25 c 1.0 [1] - 5.5 v i 2 c-bus active; f scl = 400 khz 1.8 [1] - 5.5 v supply voltage for reliable clock/calendar information t amb =25 cv low - 5.5 v i dd1 supply current; clkout disabled (fe = 0) f scl = 400 khz [2] -- 800 m a f scl = 100 khz -- 200 m a f scl = 0 hz; t amb =25 c [2] v dd =5v - 275 550 na v dd =3v - 250 500 na v dd =2v - 225 450 na f scl =0hz [2] v dd =5v - 500 750 na v dd =3v - 400 650 na v dd =2v - 400 600 na i dd2 supply current; clkout enabled (f clkout = 32 khz; fe = 1) f scl = 0 hz; t amb =25 c [2] v dd =5v - 825 1600 na v dd =3v - 550 1000 na v dd =2v - 425 800 na f scl =0hz [2] v dd =5v - 950 1700 na v dd =3v - 650 1100 na v dd =2v - 500 900 na inputs v il low-level input voltage v ss - 0.3v dd v v ih high-level input voltage 0.7v dd - v dd v i li input leakage current v i =v dd or v ss - 1 - +1 m a c i input capacitance [3] -- 7pf outputs i ol(sda) low-level output current; pin sda v ol = 0.4 v; v dd =5v - 3 -- ma i ol( int) low-level output current; pin int - 1 -- ma i ol(clkout) low-level output current; pin clkout - 1 -- ma
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 18 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. [1] for reliable oscillator start-up at power-up: v dd(min)power-up = v dd(min) + 0.3 v. [2] timer source clock = 1 60 hz; scl and sda = v dd. [3] tested on sample basis. i oh(clkout) high-level output current; pin clkout v oh = 4.6 v; v dd =5v 1 -- ma i lo output leakage current v o =v dd or v ss - 1 - +1 m a voltage detector v low voltage-low detection level t amb =25 c - 0.9 1.0 v table 29: static characteristics continued v dd = 1.8 to 5.5 v; v ss =0v; t amb = - 40 to 85 c; f osc = 32.768 khz; quartz r s =40k w ; c l = 8 pf; unless otherwise speci?ed. symbol parameter conditions min typ max unit t amb =25 c; timer = 1 minute. t amb =25 c; timer = 1 minute. fig 14. i dd as a function of v dd ; clkout disabled. fig 15. i dd as a function of v dd ; clkout = 32 khz. v dd = 3 v; timer = 1 minute. t amb =25 c; normalized to v dd =3v. fig 16. i dd as a function of t amb ; clkout = 32 khz. fig 17. frequency deviation as function of v dd . handbook, halfpage 02 6 mgr888 4 v dd (v) 1 0 0.4 0.2 0.8 0.6 i dd ( m a) handbook, halfpage 02 6 mgr889 4 v dd (v) 1 0 0.4 0.2 0.8 0.6 i dd ( m a) handbook, halfpage - 40 0 40 120 mgr890 80 t ( c) 1 0 0.4 0.2 0.8 0.6 i dd ( m a) handbook, halfpage 02 6 4 2 - 4 - 2 0 mgr891 4 v dd (v) frequency deviation (ppm)
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 19 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 11. dynamic characteristics [1] unspeci?ed for f clkout = 32.768 khz. [2] all timing values are valid within the operating supply voltage range at t amb and referenced to v il and v ih with an input voltage swing of v ss to v dd . [3] i 2 c-bus access time between two starts or between a start and a stop condition to this device must be less than one second. table 30: dynamic characteristics v dd = 1.8 to 5.5 v; v ss =0v; t amb = - 40 to +85 c; f osc = 32.768 khz; quartz r s =40k w ; c l = 8 pf; unless otherwise speci?ed. symbol parameter conditions min typ max unit oscillator c l(integrated) integrated load capacitance 15 25 35 pf d f osc /f osc oscillator stability d v dd = 200 mv; t amb =25 c - 2 10 - 7 - quartz crystal parameters (f osc = 32.768 khz) r s series resistance -- 40 k w c l parallel load capacitance - 10 - pf c t trimmer capacitance 5 - 25 pf clkout output d clkout clkout duty factor [1] - 50 - % i 2 c-bus timing characteristics [2] f scl scl clock frequency [3] -- 400 khz t hd;sta start condition hold time 0.6 --m s t su;sta set-up time for a repeated start condition 0.6 --m s t low scl low time 1.3 --m s t high scl high time 0.6 --m s t r scl and sda rise time -- 0.3 m s t f scl and sda fall time -- 0.3 m s c b capacitive bus line load -- 400 pf t su;dat data set-up time 100 -- ns t hd;dat data hold time 0 -- ns t su;sto set-up time for stop condition 4.0 --m s t sw tolerable spike width on bus -- 50 ns
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 20 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. fig 18. i 2 c-bus timing waveforms. o ok, full pagewidth sda mga728 sda scl t su;sta t su;sto t hd;sta t buf t low t hd;dat t high t r t f t su;dat
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 21 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 12. application information 12.1 quartz crystal frequency adjustment method 1: fixed osci capacitor by evaluating the average capacitance necessary for the application layout a ?xed capacitor can be used. the frequency is best measured via the 32.768 khz signal available after power-on at the clkout pin. the frequency tolerance depends on the quartz crystal tolerance, the capacitor tolerance and the device-to-device tolerance (on average 5 10 - 6 ). average deviations of 5 minutes per year can be easily achieved. method 2: osci trimmer the oscillator is tuned to the required accuracy by adjusting a trimmer capacitor on pin osci and measuring the 32.768 khz signal available after power-on at the clkout pin. method 3: osco output direct output measurement on pin osco (accounting for test probe capacitance). fig 19. application diagram. handbook, full pagewidth mgm665 scl sda v ss osci osco clock calendar pcf8563 sda scl master transmitter/ receiver v dd v dd sda scl rr v dd (i 2 c-bus) r: pull-up resistor r = 1 f t r c b
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 22 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 13. package outline fig 20. sot96-1. unit a max. a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 0.25 dimensions (inch dimensions are derived from the original mm dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 1.0 0.4 sot96-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 4 5 pin 1 index 1 8 y 076e03s ms-012aa 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.050 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.01 0.041 0.004 0.039 0.016 0 2.5 5 mm scale so8: plastic small outline package; 8 leads; body width 3.9 mm sot96-1 95-02-04 97-05-22
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 23 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. fig 21. sot97-1. references outline version european projection issue date iec jedec eiaj sot97-1 92-11-17 95-02-04 unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.14 0.53 0.38 0.36 0.23 9.8 9.2 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 1.15 4.2 0.51 3.2 inches 0.068 0.045 0.021 0.015 0.014 0.009 1.07 0.89 0.042 0.035 0.39 0.36 0.26 0.24 0.14 0.12 0.01 0.10 0.30 0.32 0.31 0.39 0.33 0.045 0.17 0.020 0.13 b 2 050g01 mo-001an m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 8 1 5 4 b e 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. pin 1 index dip8: plastic dual in-line package; 8 leads (300 mil) sot97-1
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 24 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. fig 22. sot505-1. unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) q references outline version european projection issue date iec jedec eiaj mm 0.15 0.05 0.95 0.80 0.45 0.25 0.28 0.15 3.10 2.90 3.10 2.90 0.65 5.10 4.70 0.70 0.35 6 0 0.1 0.1 0.1 0.94 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.70 0.40 sot505-1 99-04-09 w m b p d z e 0.25 14 8 5 q a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm sot505-1 1.10 pin 1 index
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 25 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 14. soldering 14.1 introduction this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations re?ow soldering is often used. 14.2 surface mount packages 14.2.1 re?ow soldering re?ow soldering requires solder paste (a suspension of ?ne solder particles, ?ux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for re?owing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical re?ow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 14.2.2 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was speci?cally developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 26 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. during placement and before soldering, the package must be ?xed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated ?ux will eliminate the need for removal of corrosive residues in most applications. 14.2.3 manual soldering fix the component by ?rst soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the ?at part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 14.3 through-hole mount packages 14.3.1 soldering by dipping or by solder wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joints for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the speci?ed maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.3.2 manual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 27 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. 14.4 package related soldering information [1] all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . [2] for sdip packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [3] these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). [4] if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. [5] wave soldering is only suitable for lqfp, qfp and tqfp packages with a pitch (e) equal to or larger than 0.8 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [6] wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 15. revision history table 31: suitability of ic packages for wave, re?ow and dipping soldering methods mounting package soldering method wave re?ow [1] dipping through-hole mount dbs, dip, hdip, sdip, sil suitable [2] - suitable surface mount bga, sqfp not suitable suitable - hlqfp, hsqfp, hsop, htssop, sms not suitable [3] suitable - plcc [4] , so, soj suitable suitable - lqfp, qfp, tqfp not recommended [4] [5] suitable - ssop, tssop, vso not recommended [6] suitable - rev date cpcn description 01 990416 - this data sheet supersedes the version of 1998 mar 25 (9397 750 03282): ? the format of this speci?cation has been redesigned to comply with philips semiconductors new presentation and information standard ? added figure 3 device diode protection diagram. on page 3 ? added figure 4 voltage-low detection. on page 5 ? added paragraph in section 8.5 voltage-low detector and clock monitor on page 5 ? added figure 14 to 17 on page 18 in section 10 .
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 28 of 30 9397 750 04855 ? philips electronics n.v. 1999 all rights reserved. 16. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. 17. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 18. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 19. licenses datasheet status product status de?nition [1] objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. spec i?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a la ter date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make ch anges at any time without notice in order to improve design and supply the best possible product. purchase of philips i 2 c components purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c speci?- cation de?ned by philips. this speci?cation can be ordered using the code 9398 393 40011.
philips semiconductors pcf8563 real-time clock/calendar product speci?cation 16 april 1999 29 of 30 9397 750 04855 ? philips electronics n.v. 1999. all rights reserved. philips semiconductors - a worldwide company argentina: see south america australia: tel. +61 29 805 4455, fax. +61 29 805 4466 austria: tel. +43 160 101, fax. +43 160 101 1210 belarus: tel. +375 17 220 0733, fax. +375 17 220 0773 belgium: see the netherlands brazil: see south america bulgaria: tel. +359 268 9211, fax. +359 268 9102 canada: tel. +1 800 234 7381 china/hong kong: tel. +852 2 319 7888, fax. +852 2 319 7700 colombia: see south america czech republic: see austria denmark: tel. +45 3 288 2636, fax. +45 3 157 0044 finland: tel. +358 961 5800, fax. +358 96 158 0920 france: tel. +33 14 099 6161, fax. +33 14 099 6427 germany: tel. +49 40 23 5360, fax. +49 402 353 6300 hungary: see austria india: tel. +91 22 493 8541, fax. +91 22 493 8722 indonesia: see singapore ireland: tel. +353 17 64 0000, fax. +353 17 64 0200 israel: tel. +972 36 45 0444, fax. +972 36 49 1007 italy: tel. +39 26 752 2531, fax. +39 26 752 2557 japan: tel. +81 33 740 5130, fax. +81 33 740 5077 korea: tel. +82 27 09 1412, fax. +82 27 09 1415 malaysia: tel. +60 37 50 5214, fax. +60 37 57 4880 mexico: tel. +9-5 800 234 7381 middle east: see italy netherlands: tel. +31 40 278 2785, fax. +31 40 278 8399 new zealand: tel. +64 98 49 4160, fax. +64 98 49 7811 norway: tel. +47 22 74 8000, fax. +47 22 74 8341 philippines: tel. +63 28 16 6380, fax. +63 28 17 3474 poland: tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: tel. +27 11 470 5911, fax. +27 11 470 5494 south america: tel. +55 11 821 2333, fax. +55 11 829 1849 spain: tel. +34 33 01 6312, fax. +34 33 01 4107 sweden: tel. +46 86 32 2000, fax. +46 86 32 2745 switzerland: tel. +41 14 88 2686, fax. +41 14 81 7730 taiwan: tel. +886 22 134 2865, fax. +886 22 134 2874 thailand: tel. +66 27 45 4090, fax. +66 23 98 0793 turkey: tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine: tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: tel. +44 181 730 5000, fax. +44 181 754 8421 united states: tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: tel. +381 11 62 5344, fax. +381 11 63 5777 for all other countries apply to: philips semiconductors, marketing & sales communications, building be, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 272 4825 internet: http://www.semiconductors.philips.com
? philips electronics n.v. 1999. printed in the netherlands all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 16 april 1999 document order number: 9397 750 04855 contents philips semiconductors pcf8563 real-time clock/calendar 1 general description . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . 1 4 quick reference data . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . 2 6 block diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 pinning information . . . . . . . . . . . . . . . . . 3 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 pin description . . . . . . . . . . . . . . . . . . . . . 3 8 functional description . . . . . . . . . . . . . . . 4 8.1 alarm function modes. . . . . . . . . . . . . . . . 4 8.2 timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8.3 clkout output . . . . . . . . . . . . . . . . . . . . 4 8.4 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.5 voltage-low detector and clock monitor . . 5 8.6 register organization . . . . . . . . . . . . . . . . 5 8.6.1 control/status 1 register . . . . . . . . . . . . . . 6 8.6.2 control/status 2 register . . . . . . . . . . . . . . 7 8.6.3 seconds, minutes and hours registers . . . . 8 8.6.4 days, weekdays, months/century and years registers . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.6.5 alarm registers . . . . . . . . . . . . . . . . . . . . 10 8.6.6 clkout frequency register . . . . . . . . . . . 11 8.6.7 countdown timer registers . . . . . . . . . . . . 11 8.7 ext_clk test mode. . . . . . . . . . . . . . . . 12 8.7.1 operation example . . . . . . . . . . . . . . . . . 12 8.8 power-on reset (por) override mode . 12 8.9 serial interface . . . . . . . . . . . . . . . . . . . . 13 8.9.1 characteristics of the i 2 c-bus . . . . . . . . . 13 8.9.2 start and stop conditions . . . . . . . . . 13 8.9.3 bit transfer . . . . . . . . . . . . . . . . . . . . . . . 14 8.9.4 acknowledge . . . . . . . . . . . . . . . . . . . . . 14 8.9.5 i 2 c-bus protocol . . . . . . . . . . . . . . . . . . . 15 9 limiting values . . . . . . . . . . . . . . . . . . . . 16 10 static characteristics . . . . . . . . . . . . . . . 17 11 dynamic characteristics . . . . . . . . . . . . . 19 12 application information . . . . . . . . . . . . . 21 12.1 quartz crystal frequency adjustment . . . 21 13 package outline . . . . . . . . . . . . . . . . . . . . 22 14 soldering . . . . . . . . . . . . . . . . . . . . . . . . . 25 14.1 introduction . . . . . . . . . . . . . . . . . . . . . . 25 14.2 surface mount packages . . . . . . . . . . . . 25 14.2.1 reflow soldering . . . . . . . . . . . . . . . . . . . 25 14.2.2 wave soldering . . . . . . . . . . . . . . . . . . . 25 14.2.3 manual soldering . . . . . . . . . . . . . . . . . . 26 14.3 through-hole mount packages. . . . . . . . 26 14.3.1 soldering by dipping or by solder wave . . . 26 14.3.2 manual soldering . . . . . . . . . . . . . . . . . . 26 14.4 package related soldering information . . 27 15 revision history . . . . . . . . . . . . . . . . . . . 27 16 data sheet status . . . . . . . . . . . . . . . . . . . 28 17 definitions . . . . . . . . . . . . . . . . . . . . . . . . 28 18 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . 28 19 licenses . . . . . . . . . . . . . . . . . . . . . . . . . . 28
1 of 2 go to philips semiconductors' home page select & go... start catalog & datasheets catalog by function discrete semiconductors audio clocks and watches data communications microcontrollers peripherals standard analog video wired communications wireless communications catalog by system automotive consumer multimedia systems communications pc/pc-peripherals cross reference models packages application notes selection guides other technical documentation end of life information datahandbook system relevant links about catalog tree about search about this site subscribe to enews catalog & datasheets search pcf8563 pcf8563 pcf8563; real - time clock/calendar the pcf8563 is a cmos real - time clock/calendar optimized for low power consumption. a programmable clock output, interrupt output and voltage - low detector are also provided. all address and data are transferred serially via a two - line bidirectional i 2 c - bus. maximum bus speed is 400 kbits/s. the built register is incremented automatically after each written or read data byte. l provides year, month, day, weekday, hours, minutes and seconds based on 32.768 khz quartz crystal l century flag l wide operating supply voltage range: 1.0 to 5.5 v l low back - up current; typical 0.25 a at v dd = 3.0 v and t amb =25 c l 400 khz two - wire i 2 c - bus interface (at v dd = 1.8 to 5.5 v) l programmable clock output for peripheral devices: 32.768 khz, 1024 hz, 32 hz and 1 hz l alarm and timer functions l voltage - low detector l integrated oscillator capacitor l internal power - on reset l i 2 c - bus slave address: read a3h; write a2h l open drain interrupt pin. l mobile telephones l portable instruments l fax machines l battery powered products. ? description ? features ? applications ? datasheet ? products, packages, availability and ordering ? find similar products ? description features applications datasheet
2 of 2 please read information about some discontinued variants of this product . pcf8563 links to the similar products page containing an overview of products that are similar in function or related to the part number(s) as listed on this page. the similar products page includes products from the same catalog tree(s) , relevant selection guides and products from the same functional category. type nr. title publication release date datasheet status page count pcf8563 real-time clock/calendar 16-apr-99 product specification 33 products, packages, availability and ordering partnumber north american partnumber order code (12nc) marking/packing package device status pcf8563p/f4 pcf8563pn 9352 622 18112 standard marking * tube sot97 full production pcf8563t/f4 pcf8563td 9352 622 17112 standard marking * tube sot96 full production pcf8563td- t 9352 622 17118 standard marking * reel pack, smd, 13" sot96 full production pcf8563ts/f4 9352 624 03118 standard marking * reel pack, smd, 13" sot505 full production find similar products: copyright ? 2000 royal philips electronics all rights reserved. terms and conditions .

▲Up To Search▲

Price & Availability of PCF8563TF4118

	To Download PCF8563TF4118 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .